In a static random access memory (SRAM) array, a write replica path is used to track a duration of an actual write time in the SRAM array. This tracking is used to generate control signals for use in operating and accessing the SRAM array. It is desirable for this duration tracking to be consistent and non-varying as much as possible to provide for suitable SRAM performance.
This is of particular importance in low voltage applications where the device operating voltage is less than the operating voltage desired by the SRAM array. In these cases, conventional write replica paths are inoperable. Therefore, further development of this technology is necessary.